Multi-Threshold FinFET Design via Fin Shape Control
Lead Inventor: Soha Hassoun
Tufts University Case T001998
Overview: Design technique for creating multi-threshold FinFET transistors via fin shape control.
Technology: A process for modifying the doping and geometric cross section of three-dimensional transistor fins in order to allow both low-power and high-power transistors on a single integrated circuit.
Opportunity: Semiconductor design requires the ability to simultaneously produce ultra-low power standby circuitry and fast, high-drive strength processing circuitry. Multi-threshold transistors such as FinFETs are a solution to this problem. The present technique enables multi-threshold transistor design for FinFETs and allows ultra-low-power circuits to coexist with high-performance circuits.
Why it Matters: The FinFET has become the standard multi-threshold transistor design in modern integrated circuits and will be for the foreseeable future. At sizes below 22 nm, the short channel effect produces an unacceptable level of leakage in bulk FinFETs. Research on smaller FinFETs has focused on silicon on insulation (SOI) technology to minimize transistor leakage. These techniques, however, may require a more complex, costly manufacturing process or a larger transistor footprint. This discovery shows that fin shape significantly impacts leakage in bulk tri-gate FinFETs and demonstrates how fin shape can be used to implement multi-threshold transistors without consuming additional integrated circuit area. This shape-controlled, multi-threshold FinFET technique provides chip designers the ability to control the leakage/saturation current tradeoff without consuming any additional circuit real estate or impacting chip layout.
Intellectual Property: US Publication No. 2017-0179121 (June 22, 2017)
Publications: Gaynor, Brad. “Fin Shape Impact on FinFET Leakage With Application to Multithreshold and Ultralow-Leakage FinFET Design” IEEE Transactions on Electron Devices 61.8 (2014): 2738-2744